Examining Tradeoffs for Hardware-Based Intellectual Property Protection

The ability to protect critical cyber infrastructure remains a multi-faceted problem facing both the commercial sector and the federal government. Hardware intellectual property (IP) embedded within application-specific integrated circuits and programmable logic devices are subject to adversarial analysis in the form of subversion, piracy, and reverse engineering. We consider the effect of transforming the programmatic logic or netlist definitions for such environments so that malicious adversaries are hindered or prevented from recovering original, higher level abstractions of combinational logic design. In this paper, we provide observations on obfuscating algorithms that use random and deterministic techniques to transform logic-level definitions into alternative, functionally equivalent forms. We define the tradeoff space for both types of techniques and show how limitations have driven research methods. Keywords/Key Phrases: Circuit protection, malicious reverse engineering, obfuscation, security research methodologies